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EE2169 Laboratory for Digital Systems Design I

These WIKI pages provide general, assignment, and supplemental information for the laboratory sections of EE2369, Digital Systems Design I.

ANNOUNCEMENT (11/16/2015) - For the week of 11/17 - 11/20 please attend your designated lab section.  We will grade Lab 8 results and conclusions as well as answer any questions regarding the final Lab.  Extensions on any previous labs will no longer be granted. - Joel & Maher.

Laboratory Information


Laboratory Assignments

Lab 1

Lab 2

Lab 3

Lab 3B

Lab 4 - Numeric Braille Printer

Lab 5 - Numeric Braille Printer Verilog & VHDL

Lab5 Verilog Header (.v file)

Lab5 VHDL Header (.vhd file)

Lab 6 - Decoder / Adder

Lab 7 - Register Transfer Communications

Transmitter UCF

Receiver UCF

Lab 8 - Finite State Machine

FINAL Lab - The Carwash Machine

 Chapter 8.4 - Digital Systems Design  - Mano & Ciletti.


ASIC World - Verilog HDL Tutorial and Examples

Introduction to Verilog - P.M. Nyasulu  

NI ELIVS II Orientation Manual

NI Digital Electronics FPGA Board - User Manual  

NI Labview Environment Tutorial

Spartan 3E DEFB User Constraints File Template

BASYS UCF Template

Xilinx ISE Design Software Download

Xilinx ISE Basic Schematic Input Tutorial (Youtube)

Xilinx ISE Getting Started and iMPACT Tutorial (pdf)

Xilinx ISE Verilog HDL Tutorial (Youtube)

Xilinx Test Bench Tutorial (pdf)

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