Skip to end of metadata
Go to start of metadata

EE2169 Laboratory for Digital Systems Design I

Welcome to Spring 2017 Class

These WIKI pages provide instructions, assignments, and supplemental information for the laboratory sections of EE2369, Digital Systems Design I.


Laboratory Information

EE2169 Syllabus Spring 2017

Add your UTEP Email here!


Laboratory Assignments

Lab1 – Binary Number Systems       (week of  January  23 - 27)

Lab2 – Switch and LED Logic           (week of January 30 - February 10)

            7404 datasheet

            7408/7409 datasheet

            7432 datasheet

Lab3 – Logic Expressions                 (week of Feb 13 - 17)

Lab3B – Logic Circuit in Xilinx ISE    (week of Feb 20 - 24)

Lab4 – Numeric Braille Writer           (week of Feb 27 - Mar 3)

Lab5 – Numeric Braille Printer with universal logic gates   (Week of Mar 6 - 10)

Lab6 – Numeric Braille Writer Verilog_VHDL                      (Friday sections: due Friday March 24) - (Other sections: Mar 20 - Mar 30)

             Lab6 Header Verilog (.v file)

             Lab6 Header VHDL (.vhd file)

Lab7 – Full Adder and BCD to 7-segment Decoder          (week of Apr 3 - Apr 7)

            Lab7_Constraints        (.UCF file)

            LAB7_HeaderSample (.v file)

Lab8 - Add_Sub_and_Transmitter (week of April 10- April 14)

           Lab_8b  (.v file)

           Lab_8a_Constraint (.ucf file)

           Lab_8b_Constraint (.ucf file)


 Lab9 – Finite State Machine          (week of Apr 17 - 21)

Final Lab – Washing Machine Controller         (week of Apr 23 - May 5)

         Sequential Logic Implementation

         A Design Example - Traffic Lights


ASIC World - Verilog HDL Tutorial and Examples

Introduction to Verilog - P.M. Nyasulu  

NI ELIVS II Orientation Manual

NI Digital Electronics FPGA Board - User Manual  

NI Labview Environment Tutorial

Spartan 3E DEFB User Constraints File Template

BASYS UCF Template

Xilinx ISE Design Software Download

Xilinx ISE Basic Schematic Input Tutorial (Youtube)

Xilinx ISE Getting Started and iMPACT Tutorial (pdf)

Xilinx ISE Verilog HDL Tutorial (Youtube)

Xilinx Test Bench Tutorial (pdf)

  • No labels