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EE2169 Laboratory for Digital Systems Design I

Welcome to Summer 2017 Class

These WIKI pages provide instructions, assignments, and supplemental information for the laboratory sections of EE2369, Digital Systems Design I.

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Laboratory Information

EE2169 Syllabus Summer 2017

 

Laboratory Assignments

Lab1 – Binary Number Systems       ( due Mon 6/12/2017)

Lab2 – Switch and LED Logic           ( due Tue 6/13/2017)

            7404 datasheet

            7408/7409 datasheet

            7432 datasheet

Lab3 – Logic Expressions                 ( due Wed 6/14/2017)

Lab3B – Logic Circuit in Xilinx ISE    ( due Mon 6/19/2017)

Lab4 – Numeric Braille Writer           ( due Tue 6/20/2017)

Lab5 – Numeric Braille Printer with universal logic gates    (due Wed 6/21/2017)

Lab6 – Numeric Braille Writer Verilog_VHDL                      (due Thur 6/22/2017)

           Lab6 Header Verilog

           Lab6 Header VHDL



 

Lab7 – Full Adder and BCD to 7-segment Decoder          (week of Apr 3 - Apr 7)

            Lab7_Constraints        (.UCF file)

            LAB7_HeaderSample (.v file)


Lab8 - Add_Sub_and_Transmitter (week of April 10- April 14)

           Lab_8b  (.v file)

           Lab_8a_Constraint (.ucf file)

           Lab_8b_Constraint (.ucf file)

 

 Lab9 – Finite State Machine          (week of Apr 17 - 21)

Final Lab – Washing Machine Controller         (week of Apr 23 - May 5)

         Sequential Logic Implementation

         A Design Example - Traffic Lights

      

ASIC World - Verilog HDL Tutorial and Examples

Introduction to Verilog - P.M. Nyasulu  

NI ELIVS II Orientation Manual

NI Digital Electronics FPGA Board - User Manual  

NI Labview Environment Tutorial

Spartan 3E DEFB User Constraints File Template

BASYS UCF Template

Xilinx ISE Design Software Download

Xilinx ISE Basic Schematic Input Tutorial (Youtube)

Xilinx ISE Getting Started and iMPACT Tutorial (pdf)

Xilinx ISE Verilog HDL Tutorial (Youtube)

Xilinx Test Bench Tutorial (pdf)

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